Thin film transistors (TFTs) are widely used today as a switching device or a driving device in display devices such as active matrix-type liquid crystal display devices and organic electro-luminescence (EL) display devices. Thin film transistors use, for example, amorphous silicon or low-temperature poly-silicon for a semiconductor layer.
The manufacture of those TFTs requires a high temperature process, and hence it is difficult to employ a flexible substrate such as a plastic substrate or film substrate which is low in heat resistance.
Amorphous silicon TFTs, when used as a driving device, have to be large in size because the field effect mobility in this case is small (to 1 cm2·V−1 s−1). This gives rise to such problems as a difficulty in making pixels finer and reducing of the amount of current flowing into an organic EL device by a change in threshold voltage of the TFT after long-hour driving.
Low-temperature poly-silicon TFTs also have the following problems. Low-temperature poly-silicon TFTs need a correction circuit for solving unevenness that is caused by an excimer laser used to crystallize silicon, resulting in complicating the circuit design. In addition, increasing the screen size is difficult because the screen size is limited by how large an area an excimer laser can irradiate.
Meanwhile, the development of TFTs including channel layers made of an oxide semiconductor which uses ZnO as the main component has recently become active (see Japanese Patent Application Laid-Open No. 2002-076356).
Oxide semiconductors, which can be made into a film at as low a temperature as 200° C. or lower and can accordingly form a flexible TFT on a plastic substrate or a film substrate, are considered to be a possible solution for the above-mentioned problems.
A technology of using an amorphous oxide semiconductor that is made of indium, gallium, zinc, and oxygen for a channel layer of a TFT has also been disclosed recently.
It is reported in Volumes 488 and 432 of Nature (2004) that an amorphous oxide semiconductor TFT which exhibits high field effect mobility (6 to 9 cm2·V−1 s−1) can be formed at room temperature on a substrate such as a polyethylene terephthalate (PET) film. R. Hayashi et al., J. SID, Vol. 15, Issue 11, pp. 915-921 (2007) describes that TFT characteristics uniform throughout a range of 1×1 cm2 can be obtained by forming an amorphous oxide semiconductor film at room temperature by the RF magnetron sputtering method. C. J. Kim et al., IEEE IEDM Proceedings, 2006 describes that a threshold voltage change of an amorphous oxide semiconductor TFT after driven for a hundred consecutive hours is much smaller compared with an amorphous silicon TFT and the amorphous oxide semiconductor TFT is highly stable under electrical stress. It is predicted in S. I. Kim et al., IEEE IEDM Proceedings, 2007 that an extrapolation value of a threshold voltage change that an amorphous oxide semiconductor TFT undergoes over 30,000 hours would be extremely low at 2 V or lower.
Oxide semiconductor TFTs are thus extremely promising as a switching device or a driving device which replaces amorphous silicon TFTs or low-temperature poly-silicon TFTs for display devices that use a flexible substrate and for organic EL display devices.
Further, technologies for enhancing the performance of oxide semiconductor TFTs are now disclosed.
Japanese Patent Application Laid-Open No. 2007-220817 discloses a method in which a gate insulating layer and a gate electrode are used as a mask to form an interlayer insulating layer containing hydrogen in a semiconductor layer of a top gate type polycrystalline oxide TFT that includes ZnO as the main component. By thus increasing the hydrogen concentration of the semiconductor layer, the resistance of the semiconductor layer is reduced and source/drain electrodes are formed in a self-aligning manner, with the result that a coplanar structure TFT is obtained. With this structure, the parasitic resistance between the source/drain regions and a channel region can be kept small, whereby current rate control is prevented. The parasitic capacitance between the source/drain regions and the gate electrode is also reduced, which provides an effect such as improved TFT operating speed.
International Publication No. WO2007/119386 discloses a method of performing hydrogen plasma treatment on an oxide semiconductor layer of a top gate type amorphous oxide semiconductor TFT with a gate insulating layer and a gate electrode as a mask. According to the above-mentioned method, the resistance of the semiconductor layer is reduced, source/drain electrodes are formed in a self-aligning manner, and a coplanar structure TFT is obtained.
However, top gate type coplanar structure TFTs in which source/drain electrodes are formed in a self-aligning manner as those disclosed in Japanese Patent Application Laid-Open No. 2007-220817 and International Publication No. WO2007/119386 need to form a gate insulating layer on the oxide semiconductor channel layer. In the case where the plasma-enhanced chemical vapor deposition (CVD) method or the sputtering method is used to form the gate insulating layer, damage caused by plasma to the oxide semiconductor channel layer becomes a problem. Further, in the case where the gate insulating layer is a silicon nitride film or a silicon oxide film that is formed by the plasma-enhanced CVD method, hydrogen contained in the film diffuses into the oxide semiconductor channel layer, thereby lowering the resistance of the oxide semiconductor. Countermeasures against those problems have to be taken, such as employing a gate insulating layer of low hydrogen content as described in Japanese Patent Application Laid-Open No. 2007-220817. However, a gate insulating layer that is low in insulating ability raises the gate leakage current of the TFT, and a defect at the interface between the gate insulating layer and the oxide semiconductor layer causes lowering of ON current and an increase in S value. For this reason, bottom gate structure TFTs, with which the method and conditions for forming a gate insulating layer can be selected without giving consideration to the problem of the lowering of oxide semiconductor resistance, are desirable.
In the case of using an amorphous semiconductor TFT as a driving device of an organic EL display device, the stability of the threshold voltage when the TFT is kept driven for a long period of time is not high enough even at a level illustrated in S. I. Kim et al., IEEE IEDM Proceedings, 2007, and a circuit for correcting the threshold voltage is necessary. Further improvement of stability under electrical stress is therefore demanded.